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  • Vector Motors — Infobox Company company name = Vector Motors Corporation company company type = Private foundation = 1971 location = Wilmington, California key people = Gerald Wiegert Chairman CEO industry = Automotive products = The Vector Vector W2 Vector W8… …   Wikipedia

  • Support vector machine — Support vector machines (SVMs) are a set of related supervised learning methods used for classification and regression. Viewing input data as two sets of vectors in an n dimensional space, an SVM will construct a separating hyperplane in that… …   Wikipedia

  • Automatic test pattern generation — ATPG (acronym for both Automatic Test Pattern Generation and Automatic Test Pattern Generator) is an electronic design automation method/technology used to find an input (or test) sequence that, when applied to a digital circuit, enables testers… …   Wikipedia

  • Support vector machine — Machine à vecteurs de support Les machines à vecteurs de support ou séparateurs à vaste marge (en anglais Support Vector Machine, SVM) sont un ensemble de techniques d apprentissage supervisé destinées à résoudre des problèmes de… …   Wikipédia en Français

  • Serial Vector Format — (SVF) is a vector exchange format, designed to enable transfer of boundary scan vectors between tools. SVF is expressing test patterns that represent the stimulus, expected response, and mask data for IEEE 1149.1 based tests.The SVF file is… …   Wikipedia

  • Power-on self-test — (POST) is the common term for a computer, router or printer s pre boot sequence. The same basic sequence is present on all computer architectures. It is the first step of the more general process called initial program load (IPL), booting, or… …   Wikipedia

  • Joint Test Action Group — (kurz JTAG) bezeichnet den IEEE Standard 1149.1, der eine Ansammlung von Verfahren zum Testen und Debuggen von elektronischer Hardware direkt in der Schaltung beschreibt. Das heute prominenteste und gleichzeitig zuerst in JTAG implementierte… …   Deutsch Wikipedia

  • Design for testing — Design for Test (aka Design for Testability or DFT ) is a name for design techniques that add certain testability features to a microelectronic hardware product design. The premise of the added features is that they make it easier to develop and… …   Wikipedia

  • Single Stuck Line — is a fault model used in digital circuits. It is used for post manufacturing testing, not design testing. The model assumes one line or node in the digital circuit is stuck at logic high or logic low. When a line is stuck it is called a fault.… …   Wikipedia

  • White noise — is a random signal (or process) with a flat power spectral density. In other words, the signal contains equal power within a fixed bandwidth at any center frequency. White noise draws its name from white light in which the power spectral density… …   Wikipedia

  • MAD (programming language) — MAD Paradigm(s) Imperative Appeared in 1959 Developer Galler, Arden, and Graham Major implementations IBM 704, IBM 7090, UNIVAC 1108, Philco 210 211, IBM S/360, and IBM S/370 …   Wikipedia

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